|
Stock, F., Koch, A.
|
|
Architecture Exploration and Tools for Pipelined Coarse-grained Reconfigurable Arrays
|
International Conference On Field-Programmable Logic (FPL), Madrid, 09-06.
|
Kasprzyk, N., Koch, A.
|
|
Verbesserte Hardware-Software-Partitionierung für Adaptive Computer
|
Architecture of Computing Systems (ARCS): Workshop on Dynamically Reconfigurable Systems, Augsburg, 03-04.
|
Rock, M., Koch, A.
|
|
Architecture-Independent Meta-Optimization by Aggressive Tail Splitting
|
Conference on High-Performance Computer Architecture (HPCA), Pisa, 08-04.
|
Gädke, H., Koch A.
|
|
Wavelet-based Image Compression on the Reconfigurable Computer ACE-V
|
Intl. Conf. On Field-Programmable Logic (FPL), Antwerpen, 09-04.
|
Lange H., Koch A.
|
|
Hardware/Software-Codesign by Automatic Embedding of Complex IP Cores
|
Intl. Conf. On Field-Programmable Logic (FPL), Antwerpen, 09-04.
|
Schmidt, C., Koch, A.
|
|
Fast Region Labeling on
the Reconfigurable Platform ACE-V
|
Workshop on Field Programmable Logic
and Applications, Lissabon, 09-03
|
Koch, A.
|
|
Compilation for
Adaptive Computers: Experiences and Opportunities
|
IBFI-Seminar Dynamically Reconfigurable
Architectures, Dagstuhl, 07-03
|
Kasprzyk, N., Koch, A.,
Golze, U., Rock, M.
|
|
An Improved
Intermediate Representation for Datapath Generation
|
International Conference on Engineering
of Reconfigurable Systems and Algorithms, Las Vegas, 06-03
|
Koch, A.
|
|
Tutorial:
Reconfigurable Computing - Fundamentals, Architectures, and Tools
|
Conference on Design Automation and
Test in Europe (DATE), München, 03-03
|
Kasprzyk, N., Koch, A.,
Golze, U., Rock, M.
|
|
Eine effiziente
Kontrollfluss-Repräsentation für die Erzeugung von Datenpfaden
|
11. E.I.S. Workshop, Erlangen, 03-03
|
Koch, A., Kasprzyk, N.
|
|
Module Generators
Driving the Compilation for Adaptive Computing Systems
|
IEEE International Symposium on FCCMs,
Napa Valley, CA, USA, 04-02
|
Koch, A.
|
|
Architectures and Tools
for Heterogeneous Reconfigurable Systems
|
IEEE Workshop on Heteregeneous
Reconfigurable Systems-on-Chip, Hamburg, 04-02
|
Koch, A.
|
|
Compilation for Adaptive
Computing Systems Using Complex Parameterized Hardware Objects
|
Journal of Supercomputing 21, p.
179-190, 2002
|
Neumann, T., Koch, A.
|
|
A Generic Library for
Adaptive Computing Environments
|
Workshop on Field-Programmable Logic and
Applications, Belfast, 08-01
|
Kasprzyk, N., Koch, A.
|
|
Advances in Compiler
Construction for Adaptive Computers
|
International Conference on Parallel and
Distributed Processing Techniques and Applications, Las Vegas, 06-01
|
Koch, A.
|
|
Adaptive Rechensysteme
und ihre Entwurfswerkzeuge
|
10. E.I.S.-Workshop, Dresden, 04-01
|
Lange, H., Koch, A.
|
|
Memory Access Schemes
for Configurable Processors
|
Workshop on Field-Programmable Logic and
Applications, Villach, 08-00
|
Koch, A.
|
|
Creation and Embedding
of Complex Parameterized Hardware Objects
|
Workshop on Engineering of
Reconfigurable Hardware/Software Objects, Las Vegas, 06-00
|
Koch, A.
|
|
A Comprehensive
Prototyping Platform for Hardware-Software Codesign
|
Workshop on Rapid Systems Prototyping,
Paris, 06-00
|
Koch, A.
|
|
Adaptive Rechensysteme -
Architekturen und Werkzeuge
|
9. E.I.S.-Workshop, Darmstadt, 09-99
|
Koch, A.
|
|
On Tool Integration in
High-Performance FPGA Design Flows
|
Intl. Workshop on Field-Programmable
Logic and Applications, Glasgow (Scotland), 09-99
|
Boege, M., Koch, A.
|
|
A Processor for
Artificial Life Simulation
|
Intl. Workshop on Field-Programmable
Logic and Applications, Glasgow (Scotland), 09-99
|
Koch, A.
|
|
Enabling Automatic
Module Generation for FCCM Compilers
|
IEEE Intl. Symp. on FCCMs, Napa Valley
(CA, USA), 04-99
|
Koch, A.
|
|
Unified Access to
Heterogeneous Module Generators
|
IEEE Intl. Symp. on FPGAs, Monterey (CA,
USA), 02-99
|
Koch, A.
|
|
Generator-based Design
Flows for Reconfigurable Computing: A Tutorial on Tool Integration
using FLAME
|
PACT98 Workshop on Reconfigurable
Computing, Paris, 10-98
|
Koch, A.
|
|
Accessing Module
Libraries (Vortrag)
|
ACS Principal Investigator Conference,
Napa Valley (CA, USA), 04-98
|
Koch, A.
|
|
Proposal for inter-tool
communication protocols in the ACS/NC System (Vortrag)
|
Synopsys Inc., Mountain View (CA, USA),
04-98
|
Koch, A.
|
|
Efficient Datapath
Composition for Coarse-Grained FPGAs (Vortrag)
|
Xilinx Inc., San Jose (CA, USA), 04-98
|
Koch, A.
|
|
Efficient Datapath
Composition for Coarse-Grained FPGAs (Vortrag)
|
Xilinx Inc., San Jose (CA, USA), 04-98
|
Koch, A.
|
|
FLAME - A Flexible API
for Module-based Environments (Vortrag)
|
2nd ACS Project Review, Berkeley (CA,
USA), 03-98
|
Koch, A.
|
|
Regular Datapaths on
Field-Programmable Gate Arrays (Vortrag)
|
3rd BRASS/IRAM Industrial Feedback
Retreat, Granlibakken (NV, USA), 01-98
|
Koch, A.
|
|
Practical Experiences
with the SPARXIL Co-Processor
|
31st Asilomar Conference on Signals,
Systems, and Computers, Pacific Grove (CA), 1997
|
Koch, A.
|
|
Regular Datapaths on
Field-Programmable Gate Arrays (Doktorarbeit)
|
Tech. Univ. Braunschweig (Germany) 1997
|
Koch, A.
|
|
Objekt-orientierte
Modellierung von hybriden Hardware- Software-Systemen am Beispiel des
''European Home System'' (EHS) Standards
|
Proc. 8. E.I.S. Workshop, Hamburg 1997
|
Koch, A.
|
|
Module Compaction in
FPGA-based Regular Datapaths
|
Proc. 33rd Design Automation Conference
(DAC), Las Vegas 1996
|
Koch, A.
|
|
Structured Design
Implementation - A Strategy for Implementing Regular Datapaths on FPGAs
|
Proc. 4th International Symposium on
FPGAs (FPGA), Monterey 1996
|
Koch, A.
|
|
Effiziente
Implementierung von Datenpfaden auf FPGAs
|
Proc. 7. E.I.S. Workshop, Chemnitz 1995
|
Koch, A.
|
|
Structured Design
Implementation - Eine Implementierungsstrategie für Datenpfade auf
FPGAs
|
Proc. GI/ITG Workshop
"Anwenderprogrammierbare Schaltungen", Karlsruhe 1995
|
Koch, A.
|
|
A Universal Co-Processor
for Workstations
|
in "More FPGAs'', Hrsg. Moore, W., Luk,
W., Oxford 1994
|
Koch, A.
|
|
User-friendly FPGA
Design with an Improved Cadence Opus - Xilinx XACT Interface
|
Proc. 5th EUROCHIP Workshop, Dresden 1994
|
Koch, A.
|
|
SPARXIL: Ein
konfigurierbarer FPGA-Coprozessor
|
Proc. GI/ITG Workshop "Arch. für
hochintegrierte Schaltungen'', Schloß Dagstuhl 1994
|
Koch, A.
|
|
An FPGA-based
Co-Processor for SBus Workstations
|
Proc. 3rd Conference on Field
Programmable Logic and Applications (FPL), Oxford 1993
|
Koch, A.
|
|
FPGA Applications in
Education and Research
|
Proc. 4th EUROCHIP Workshop, p. 260-265,
Toledo 1993
|
Koch, A.
|
|
Experiences with the
Framework Cadence Skill/IL
|
Proc. 3rd EUROCHIP Workshop, p. 118-123,
Grenoble 1992
|
Koch, A.
|
|
Integrationssprachen in
VLSI-Design-Frameworks am Beispiel von Cadence Skill/IL
|
Diplomarbeit, Tech. Univ. Braunschweig
(Germany) 1992
|
|